//all
`define RstEnable 1'b1
`define RstDisable 1'b0
`define ZeroWord 32'h00000000
`define WriteEnable 1'b1
`define WriteDisable 1'b0
`define ReadEnable 1'b1
`define ReadDisable 1'b0
`define AluOpBus 7:0
`define AluSelBus 2:0
`define InstValid 1'b0
`define InstInvalid 1'b1
`define Stop 1'b1
`define NoStop 1'b0
`define InDelaySlot 1'b1
`define NotInDelaySlot 1'b0
`define Branch 1'b1
`define NotBranch 1'b0
`define InterruptAssert 1'b1
`define InterruptNotAssert 1'b0
`define TrapAssert 1'b1
`define TrapNotAssert 1'b0
`define True_v 1'b1
`define False_v 1'b0
`define ChipEnable 1'b1
`define ChipDisable 1'b0


//ex
`define EXE_ADD  6'b100000
`define EXE_SUB  6'b100010
`define EXE_OR   6'b100101
`define EXE_AND  6'b100100
`define EXE_XOR 6'b100110
`define EXE_NOR 6'b100111
`define EXE_SLT  6'b101010
`define EXE_SLTU  6'b101011
`define EXE_SLL  6'b000000
`define EXE_SRL  6'b000010
`define EXE_SRA  6'b000011
`define EXE_LUI 6'b001111
`define EXE_ADDU  6'b100001
`define EXE_ADDIU  6'b001001
`define EXE_SUBU  6'b100011
`define EXE_LW  6'b100011
`define EXE_SW  6'b101011
`define EXE_BEQ  6'b000100
`define EXE_BNE  6'b000101
`define EXE_JAL  6'b000011
`define EXE_JR  6'b001000

`define EXE_DIV  6'b011010
`define EXE_DIVU  6'b011011

`define EXE_MULT  6'b011000
`define EXE_MULTU  6'b011001
`define EXE_MUL  6'b000010

`define EXE_NOP 6'b000000
///
`define SSNOP 32'b00000000000000000000000001000000
///
`define EXE_SPECIAL_INST 6'b000000
`define EXE_REGIMM_INST 6'b000001
`define EXE_SPECIAL2_INST 6'b011100

//AluOp
`define EXE_ADD_OP  8'b00100000
`define EXE_SUB_OP  8'b00100010
`define EXE_OR_OP    8'b00100101
`define EXE_AND_OP   8'b00100100
`define EXE_XOR_OP  8'b00100110
`define EXE_NOR_OP  8'b00100111
`define EXE_SLT_OP  8'b00101010
`define EXE_SLTU_OP  8'b00101011
`define EXE_SLL_OP  8'b01111100
`define EXE_SRL_OP  8'b00000010
`define EXE_SRA_OP  8'b00000011
`define EXE_LUI_OP  8'b01011100   
`define EXE_ADDU_OP  8'b00100001
`define EXE_ADDIU_OP  8'b01010110
`define EXE_SUBU_OP  8'b00100011
`define EXE_LW_OP  8'b11100011
`define EXE_SW_OP  8'b11101011
`define EXE_BEQ_OP  8'b01010001
`define EXE_BNE_OP  8'b01010010
`define EXE_JAL_OP  8'b01010000
`define EXE_JR_OP  8'b00001000

`define EXE_BLEZ_OP  8'b01010011

`define EXE_DIV_OP  8'b00011010
`define EXE_DIVU_OP  8'b00011011

`define EXE_MULT_OP  8'b00011000
`define EXE_MULTU_OP  8'b00011001
`define EXE_MUL_OP  8'b10101001

`define EXE_NOP_OP    8'b00000000

//AluSel
`define EXE_RES_NOP 3'b000
`define EXE_RES_LOGIC 3'b001
`define EXE_RES_SHIFT 3'b010
`define EXE_RES_MOVE 3'b011	
`define EXE_RES_ARITHMETIC 3'b100	
`define EXE_RES_MUL 3'b101
`define EXE_RES_JUMP_BRANCH 3'b110
`define EXE_RES_LOAD_STORE 3'b111	



//inst_rom
`define InstAddrBus 31:0
`define InstBus 31:0
`define InstMemNum 131071
`define InstMemNumLog2 17

//data_ram
`define DataAddrBus 31:0
`define DataBus 31:0
`define DataMemNum 131071
`define DataMemNumLog2 17
`define ByteWidth 7:0

//regfile
`define RegAddrBus 4:0
`define RegBus 31:0
`define RegWidth 32
`define DoubleRegWidth 64
`define DoubleRegBus 63:0
`define RegNum 32
`define RegNumLog2 5
`define NOPRegAddr 5'b00000

//div
`define DivFree 2'b00
`define DivByZero 2'b01
`define DivOn 2'b10
`define DivEnd 2'b11
`define DivResultReady 1'b1
`define DivResultNotReady 1'b0
`define DivStart 1'b1
`define DivStop 1'b0
//CP0
`define CP0_REG_COUNT    5'b01001        
`define CP0_REG_COMPARE    5'b01011     
`define CP0_REG_STATUS    5'b01100      
`define CP0_REG_CAUSE    5'b01101     
`define CP0_REG_EPC    5'b01110          
`define CP0_REG_PrId    5'b01111        
`define CP0_REG_CONFIG    5'b10000       
